Computer performance

Results: 6359



#Item
31Cyclic Dependencies in Modular Performance Analysis Bengt Jonsson Computer Engineering and Networks Lab. ETH Zurich, Switzerland

Cyclic Dependencies in Modular Performance Analysis Bengt Jonsson Computer Engineering and Networks Lab. ETH Zurich, Switzerland

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Source URL: user.it.uu.se

Language: English - Date: 2008-05-29 04:50:12
    32Vol 442|13 July 2006|doi:nature04968 LETTERS A high-performance brain–computer interface Gopal Santhanam1*, Stephen I. Ryu1,2*, Byron M. Yu1, Afsheen Afshar1,3 & Krishna V. Shenoy1,4 Recent studies have demons

    Vol 442|13 July 2006|doi:nature04968 LETTERS A high-performance brain–computer interface Gopal Santhanam1*, Stephen I. Ryu1,2*, Byron M. Yu1, Afsheen Afshar1,3 & Krishna V. Shenoy1,4 Recent studies have demons

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    Source URL: users.ece.cmu.edu

    Language: English - Date: 2006-09-08 12:24:18
      33Vehicle PERFORMANCE COMPUTER Ve c t o r S E R I E S with Vacuum Fluorescent Display OWNER’S MANUAL

      Vehicle PERFORMANCE COMPUTER Ve c t o r S E R I E S with Vacuum Fluorescent Display OWNER’S MANUAL

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      Source URL: www.beltronics.com

      Language: English - Date: 2008-09-21 18:50:30
        34Techniques for Fast Instruction Cache Performance Evaluation DAVID B. WHALLEY Department of Computer Science B-173, Florida State University, Tallahassee, FL 32306, U.S.A. SUMMARY

        Techniques for Fast Instruction Cache Performance Evaluation DAVID B. WHALLEY Department of Computer Science B-173, Florida State University, Tallahassee, FL 32306, U.S.A. SUMMARY

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        Source URL: www.cs.fsu.edu

        - Date: 2016-05-22 06:57:01
          35Advanced Design, Analysis and Verification of NoC Architectures Abstract Communication fabrics are critical for the quality (correctness, performance, energy, reliability) and fast integration of future computer systems

          Advanced Design, Analysis and Verification of NoC Architectures Abstract Communication fabrics are critical for the quality (correctness, performance, energy, reliability) and fast integration of future computer systems

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          Source URL: pact2014.pactconf.org

          - Date: 2014-05-09 16:35:14
            36DULO: An Effective Buffer Cache Management Scheme to Exploit Both Temporal and Spatial Locality Song Jiang Performance & Architecture Laboratory Computer & Computational Sciences Div. Los Alamos National Laboratory

            DULO: An Effective Buffer Cache Management Scheme to Exploit Both Temporal and Spatial Locality Song Jiang Performance & Architecture Laboratory Computer & Computational Sciences Div. Los Alamos National Laboratory

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            Source URL: www.csc.lsu.edu

            - Date: 2013-07-24 01:58:00
              37A New DMA Registration Strategy for Pinning-Based High Performance Networks Christian Bell Dan Bonachea Computer Science Division University of California, Berkeley

              A New DMA Registration Strategy for Pinning-Based High Performance Networks Christian Bell Dan Bonachea Computer Science Division University of California, Berkeley

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              Source URL: gasnet.lbl.gov

              - Date: 2018-02-02 13:25:26
                38Improving Memory Hierarchy Performance for Irregular Applications Using Data and Computation Reorderings* John Mellor-Crummey†, David Whalley‡, Ken Kennedy† † Department of Computer Science, MS 132 Rice Universit

                Improving Memory Hierarchy Performance for Irregular Applications Using Data and Computation Reorderings* John Mellor-Crummey†, David Whalley‡, Ken Kennedy† † Department of Computer Science, MS 132 Rice Universit

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                Source URL: www.cs.fsu.edu

                - Date: 2016-05-22 06:59:59